Most of the power and usefulness of today's digital integrated circuit (IC) devices can be attributed to the increasing levels of integration. More and more components (resistors, diodes, transistors, and the like) are continually being integrated into the underlying chip, or IC. The starting material for typical ICs is very high purity silicon. The material is grown as a single crystal. It takes the shape of a solid cylinder. This crystal is then sawed (like a loaf of bread) to produce wafers typically 10 to 30 cm in diameter and 250 microns thick.
The geometry of the features of the IC components are commonly defined photographically through a process known as photolithography. Very fine surface geometries can be reproduced accurately by this technique. The photolithography process is used to define component regions and build up components one layer on top of another. Complex ICs can often have many different built up layers, each having components, each layer having differing interconnections, and each layer stacked on top of the previous layer. The resulting topography of these complex IC's often resemble familiar terrestrial "mountain ranges," with many "hills" and "valleys" as the IC components are built up on the underlying surface of the silicon wafer.
In the photolithography process, a mask image, or pattern, defining the various components, is focused onto a photosensitive layer using ultraviolet light. The image is focused onto the surface using the optical means of the photolithography tool, and is imprinted into the photosensitive layer. To build ever smaller features, increasingly fine images must be focused onto the surface of the photosensitive layer, i.e. optical resolution must increase. As optical resolution increases, the depth of focus of the mask image correspondingly narrows. This is due to the narrow range in depth of focus imposed by the high numerical aperture lenses in the photolithography tool. This narrowing depth of focus is often the limiting factor in the degree of resolution obtainable, and thus, the smallest components obtainable using the photolithography tool. The extreme topography of complex ICs, the "hills" and "valleys," exaggerate the effects of decreasing depth of focus. Thus, in order to properly focus the mask image defining sub-micron geometries onto the photosensitive layer, a precisely flat surface is desired. The precisely flat (i.e., fully planarized) surface will allow for extremely small depths of focus, and in turn, allow the definition and subsequent fabrication of extremely small components.
Chemical mechanical polishing (CMP) is a preferred method of obtaining full planarization of a semiconductor wafer. It involves removing a sacrificial layer or portion of sacrificial layer of dielectric material using mechanical contact between the wafer and a moving polishing pad saturated with slurry. Polishing flattens out height differences, since high areas of topography (hills) are removed faster than areas of low topography (valleys). Polishing is the only technique with the capability of smoothing out topography over millimeter scale planarization distances leading to maximum angles of much less than one degree after polishing.
FIG. 1 shows a top view of a chemical mechanical polishing (CMP) machine 100 and FIG. 2 shows a side view of the CMP machine 100. The CMP machine 100 is fed semiconductor wafers to be polished. The CMP machine 100 picks up the wafers with an arm 101 and places them onto a rotating polishing pad 102. The polishing pad 102 is made of a resilient material and is textured, often with a plurality of predetermined grooves 103, to aid the polishing process. The polishing pad 102 rotates on a platen 104, or turn table located beneath the polishing pad 102, at a predetermined speed. A wafer 105 is held in place on the polishing pad 102 within a carrier ring 112 that is connected to a carrier film 106 of the arm 101. The lower surface of the wafer 105 rests against the polishing pad 102. The upper surface of the wafer 105 is against the lower surface of the carrier film 106 of the arm 101. As the polishing pad 102 rotates, the arm 101 rotates the wafer 105 at a predetermined rate. The arm 101 forces the wafer 105 into the polishing pad 102 with a predetermined amount of down force. The CMP machine 100 also includes a slurry dispense arm 107 extending across the radius of the polishing pad 102. The slurry dispense arm 107 dispenses a flow of slurry onto the polishing pad 102.
The slurry is a mixture of deionized water and polishing agents designed to chemically aid the smooth and predictable planarization of the wafer. The rotating action of both the polishing pad 102 and the wafer 105, in conjunction with the polishing action of the slurry, combine to planarize, or polish, the wafer 105 at some nominal rate. This rate is referred to as the removal rate. A constant and predictable removal rate is important to the uniformity and throughput performance of the wafer fabrication process. The removal rate should be expedient, yet yield precisely planarized wafers, free from surface anomalies. If the removal rate is too slow, the number of planarized wafers produced in a given period of time decreases, hurting wafer throughput of the fabrication process. If the removal rate is too fast, the CMP planarization process will not be uniform across the surface of the wafers, hurting the yield of the fabrication process.
To aid in maintaining a stable removal rate, the CMP machine 100 includes a conditioner assembly 120. The conditioner assembly 120 includes a conditioner arm 108, which extends across the radius of the polishing pad 102. An end effector 109 is connected to the conditioner arm 108. The end effector 109 includes an abrasive conditioning disk 110 which is used to roughen the surface of the polishing pad 102. The conditioning disk 110 is rotated by the conditioner arm 108 and is translationally moved towards the center of the polishing pad and away from the center of the polishing pad 102, such that the conditioning disk 110 covers the radius of the polishing pad 102. In so doing, conditioning disk 110 covers the surface area of the polishing pad 102, as polishing pad 102 rotates. A polishing pad having a roughened surface has an increased number of micro-pits and gouges in its surface from the conditioner assembly 120 and therefore produces a faster removal rate. This is due in part to the increase in slurry transfer to the surface of the wafer 105 and the increase polishing by-product removal away from he surface of the wafer 105. Without conditioning, the surface of polishing pad 102 is smoothed during the polishing process and removal rate decreases dramatically. The conditioner assembly 120 re-roughens the surface of the polishing pad 102, thereby improving the removal rate by improving the transport of slurry and by-products.
As described above, the CMP process uses an abrasive slurry on a polishing pad. The polishing action of the slurry is comprised of an abrasive frictional component and a chemical component. The abrasive frictional component is due to the friction between the surface of the polishing pad, the surface of the wafer, and abrasive particles suspended in the slurry. The chemical component is due to the presence in the slurry of polishing agents which chemically interact with the material of the dielectric layer of the wafer 105. The chemical component of the slurry is used to soften the surface of the dielectric layer to be polished, while the frictional component removes material from the surface of the wafer 105.
Referring still to FIG. 1 and FIG. 2, the polishing action of the slurry determines the removal rate and removal rate uniformity, and thus, the effectiveness of the CMP process. As slurry is "consumed" in the polishing process, the transport of fresh slurry to the surface of the wafer 105 and the removal of polishing by-products away from the surface of the wafer 105 becomes very important in maintaining the removal rate. Slurry transport is facilitated by the texture of the surface of the polishing pad 102. This texture is comprised of both predefined grooves 103 and micro-pits that are manufactured into the surface of the polishing pad 102 and the inherently rough surface of the material from which the polishing pad 102 is made.
The slurry is typically transported by the grooves 103 or pits of the polishing pad 102 under the edges of the wafer 105 as both the polishing pad 102 and the wafer 105 rotate. Consumed slurry and polishing by-products, in a similar manner, are also typically transported by the grooves 103 or pits of the polishing pad 102 away from the surface of the wafer 105. As the polishing process continues, fresh slurry is continually dispensed onto the polishing pad from the slurry dispense arm 107. The polishing process continues until the wafer 105 is sufficiently planarized and removed from the polishing pad 102.
To maintain the required degree of roughness in the surface of the polishing pad 102, the conditioner assembly 120 re-roughens the surface of the polishing pad 102 to counteract the smoothing effect of friction with the wafer 105. Unfortunately, the abrasive action of the conditioning disk 110 produces debris (hereafter polishing by-product particles) comprised of particles of polishing pad material, particles of dielectric material from the wafer, particles of consumed slurry, and the like. These polishing by-product particles subsequently form agglomerations which clog the predetermined grooves 103 and micro-pits manufactured into the surface of the polishing pad 102 and reduce their ability to transport slurry and polishing by-products, adversely impacting the removal rate. Additionally, the polishing by-product particles can adhere to the surface of the wafer 105 and contribute to higher contamination levels.
Once the grooves 103 and micro-pits of polishing pad 102 become clogged with by-product agglomerations, there are several conventional procedures within the prior art to counteract this problem. The most common such procedure is to remove the polishing pad 102 and replace it with a new polishing pad, which requires significant down time of the CMP machine 100. This down time has an adverse effect on the wafer throughput of the fabrication process due to the fact that the CMP machine 100 is unusable for a significant amount of time during the change out of the polishing pad 102. Furthermore, the expense of paying maintenance personnel to remove the polishing pad 102 and install a new polishing pad adds to the disadvantages of this prior art solution.
Another prior art procedure to counteract the problem of clogged grooves 103 and micro-pits of the surface of the polishing pad 102 is to occasionally rinse the polishing pad 102 with deionized water in order to dislodge the polishing by-product agglomerations and particles. The problem with this prior art procedure is that while loose or non-embedded agglomerations and particles on the surface of polishing pad 102 are rinsed away, the procedure is not effective in dislodging the by-product particles and agglomerations in the grooves 103 and micro-pits of polishing pad 102.
Thus, what is desired is a system which improves the performance of a polishing pad in a CMP machine. What is further desired is a system which maintains a consistently high removal rate over a longer period of time. What is further desired is a system which increases the period of time a polishing pad may be utilized in a CMP machine before incurring a time consuming down time for polishing pad change out. The present invention provides these advantages.